Is there freedom in choosing your hardware? Find out how RISC-V is paving the way for a new open-sourced hardware movement.
Many of the major players in the semiconductor business keep their designs proprietary and device manufacturers need to pay licensing fees to use them.
Trade tensions between the US, China and Taiwan provide a challenge in the semiconductor supply chain. Smaller device manufacturers are also struggling to afford these fees and the barrier to entry is much higher.
In much the same way open-source operating systems such as Linux have empowered developers, a new open standard may shake up the way we design and make the devices that run the world today.
In this guide, we’ll look into the history of the RISC architecture, weigh the pros and cons of the technology, and dive into a few applications of RISC-V you can find today.
But first, to understand why RISC-V is so exciting, we need to understand how computers operate.
What Is an Instruction Set?
The instruction set refers to the set of operations that a computer was designed to perform at the machine level.
Think of these as the most basic commands such as adding, multiplying, loading, and storing data. The instruction set architecture is the most important interface in a computer because it divides the hardware and the software aspects.
The instruction set of a CPU tells us what the CPU can do as limited by the design of its hardware.
If you ask a CPU to add two bits together, it will know exactly what to do since there is a command built-in to the hardware to accommodate this instruction.
Complex operations like loading a YouTube video, playing a video game, or sending a tweet involve calling millions of these basic commands found within the CPU instruction set.
Common instruction set architectures (ISAs) include ARM and Intel’s x86, the former of which is the most widely used ISA in the world.
These ISAs were first developed decades ago under a proprietary license. In those earlier years, most hardware and software were proprietary.
What is RISC?
During the 1970s, computer engineers tended to focus on increasing the complexity of computer architectures.
Semiconductor technology was rapidly advancing and was capable of performing a large number of instructions. This led to a type of computer known as CISCs, or complex instruction set computers.
It turns out that much of the instructions are rarely used in practice, such as in high-level computer languages such as C. David Patterson and Carlo Sequin of the University of California at Berkeley thought that a better performance can be achieved at a much lower cost by simplifying the processor.
By reducing the amount of complexity, they can use the remaining space for memory. This hypothesis was dubbed the RISC, or reduced instruction set computer.
The RISC-I project started as a research project that aimed to prove that a RISC computer was feasible. Students at Berkeley could create a design that worked with just 31 instructions.
The control and instruction section of the chip occupied only 6% of the silicon die, whereas other chips would use half for the same purpose. Registers were added to fill in the freed up space. These registers allowed the chip to hold more working memory.
The RISC architecture found commercial success in the 1980s. However, many chips soon fell out of favor. Currently, ARM-based processors are the most common RISC processor, due to the prevalence of modern smartphones which almost exclusively use ARM chips.
What is RISC-V?
RISC-V refers to a particular open-sourced instruction set which aims to follow the RISC principles. Unlike most other ISA designs, the RISC-V ISA does not require any fees to use.
The RISC-V architecture originally started as a research project of Krste Asanović at UC Berkeley, but later invited contributors from all over the world.
A RISC-based CPU has a simplified set of instructions which only take one clock cycle to complete. They trade complexity with faster performance through the use of a load–store architecture.
This means that instructions address only registers, which are much quicker to access than main memory.
RISC-V also supports an efficient pipelining structure, which allows multiple instructions to execute in parallel.
Because RISC-V is an open standard, anyone can use the instruction set for their own products, which may lead to a revolution in the open-source hardware space.
Key Features
- Simple instruction set – Lack of a complex list of instructions allows instructions to be executed faster and makes it easier to pipeline multiple instructions.
- Modularity – RISC-V has a small standard base ISA and comes with various standard extensions. This allows users to pick only the parts they need when building their own RISC-V chips.
- Extensibility – Specific functions can be added to the main ISA through extensions. This enables users to create their own custom instructions when needed.
- Open-source IP – RISC-V is an open standard, meaning anyone who wants to use these designs can do so without having to worry about licensing fees.
- Load-store architecture – Memory is prioritized over complexity using registers.
Pros
- RISC-V is an open standard, meaning anyone can build their own chips.
- The layered and extensible design enables innovation. Anyone can implement the instruction set and can create custom extensions for custom processors.
- RISC-V is extensible. You can always add in new features to the instruction set.
- Since RISC-V is open-source, anyone can participate in looking for bugs.
- RISC-V makes it possible for an accelerated development cycle. There’s no need to handle licensing fees.
Cons
- Decentralized nature makes it difficult to release patches and updates.
- There is a possibility of fragmentation of the market. Since anyone can design their own RISC-V chips, it will be a challenge to make sure that the RISC-V market may not have the same consistent quality, security, or interoperability.
- There is no guarantee of adoption. Investing in RISC-V technology may backfire if they continue to receive only a tiny percentage of the market share.
- At the moment, RISC-V still has limited hardware support.
- Another issue is with code density. Given a certain program, a compiled RISC instruction set usually requires more bytes than when compiled to CISC. This is because it may require several RISC instructions to do a single CISC command.
Current Applications of RISC-V
RISC-V is ideal for embedded applications. These are use-cases which require software placed permanently inside a device to perform a specified set of instructions.
Think about devices in an Internet of Things ecosystem or in automotive applications and computer controllers.
Here are some applications for the RISC-V architecture you can find today.
Alibaba
It’s likely that tension between the United States and China over IP has given a reason for Chinese technology companies to make the switch to open-source.
In October 2021, Alibaba Cloud Intelligence announced that they will be using open source RISC-V processors for their architecture.
These will become the world’s first full-stack open source series processors.
“RISC-V is very attractive at this point in time because as an alternative to closed and costly ISAs, the open and free ISA RISC-V accelerates processor innovation through open-standard collaboration,” said Yu Pu, product lead for T-Head, a semiconductor company and a wholly-owned subsidiary of Alibaba.
SiFive
SiFive is a semiconductor company founded in 2015 by Krste Asanović, Yunsup Lee, and Andrew Waterman, three researchers from the University of California Berkeley.
They were able to make the very first chips that implemented the RISC-V ISA. Since then, they have been able to partner with over 100 companies to improve their devices with RISC-V chips.
Their SiFive Cores are the most silicon-deployed RISC‑V solutions in the world.
SiHive even offers a BBC Doctor Who-based RISC-V coding kit, meant to teach kids about programming and IoT technology.
This product shows promise in RISC-V architecture soon reaching the consumer devices market.
Cloud Computing
RISC-V architecture can also be used to power the cloud. Some companies are already targeting data center workloads as the next possible application of RISC-V.
High performance computing (HPC) networks are already using RISC-V to process data in transit.
Since servers take longer to produce than embedded products, it will take some time until we see entire servers running on RISC-V.
Conclusion
The way we interact with the internet is built on a solid foundation of open standards. The devices we use may also follow open standards such as the USB design or how devices connect with each other through Wi-Fi and Bluetooth.
These open standards allow all our devices and applications to become more functional and interoperable.
Open standards such as RISC-V will impact the way we design our devices.
It will empower anyone to create what they want to without having to be limited by proprietary IP. RISC-V is maintained by an active development community that is transparent and collaborative in nature.
The future of the hardware we use in our devices is now no longer decided behind closed doors, but decided out in the open, for everyone to take part in.
Do share this article if you find it insightful. Don’t miss the latest news in AI, ML, and future tech by subscribing to our weekly newsletter!
Leave a Reply